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Dragica Vasileska

Dragica Vasileska

Professor, School of Electrical, Computer and Energy Engineering, Ira A. Fulton Schools of Engineering

vasileska@asu.edu

480-965-6651

School of Electrical, Computer, and Energy Engineering
Arizona State University
PO Box 878706
Tempe, AZ 85287-8706
USA

Titles

  • Senior Sustainability Scientist, Global Institute of Sustainability and Innovation
  • Professor, School of Electrical, Computer and Energy Engineering, Ira A. Fulton Schools of Engineering

Biography

Dr. Vasileska has published over 150 journal articles in prestigious refereed journals, 15 book chapters, and 120 articles in conference proceedings in the areas of solid state electronics, transport in semiconductors, and semiconductor device modeling. She is the author or co-author of three books She has also given numerous invited talks. She is a senior member of IEEE, the American Physical Society, and Phi Kappa Phi.

Education

  • PhD, Arizona State University, 1995
  • MS, University Cyril and Methodius, 1991
  • BS, University Cyril and Methodius, 1985

Expertise

External Links

Journal Articles

2015

Muralidharan, P., D. Vasileska, S. M. Goodnick and S. Bowden. 2015. A kinetic Monte Carlo study of defect assisted transport in silicon heterojunction solar cells. Physica Status Soliidi C 12(9-11):1198-1200. DOI: 10.1002/pssc.201510071. (link )

2013

Padmanabhan, B., D. Vasileska and S. M. Goodnick. 2013. Current degradation due to electromechanical coupling in GaN HEMT's. Microelectronics Journal 44(7):592-597. DOI: 10.1016/j.mejo.2013.03.009. (link )

Vasileska, D., G. Klimeck, A. Magana and S. M. Goodnick. 2013. Tool-based curricula and visual learning. Electronics 17(2):95-104. DOI: 10.7251/ELS1317095V. (link )

2012

Raleva, K., D. Vasileska, A. Hossain, S. Yoo and S. M. Goodnick. 2012. Study of self-heating effects in SOI and conventional MOSFETs with electro-thermal particle-based device simulator. Journal of Computational Electronics 11:106-117. DOI: 10.1007/s10825-012-0384-0. (link )

Vasileska, D., K. Raleva, A. Hossain and S. M. Goodnick. 2012. Current progress in modeling self-heating effects in FD SOI devices and nanowire transistors. Journal of Computational Electronics 11:238-248. DOI: 10.1007/s10825-012-0404-0. (link )

2010

Ashok, A., D. Vasileska, O. L. Hartin and S. M. Goodnick. 2010. Electrothermal Monte Carlo simulation of GaN HEMTs including electron-electron interactions. IEEE Transactions on Electron Devices 57(3):562-570. DOI: 10.1109/TED.2009.2038585. (link )

Vasileska, D., A. Hossain, K. Raleva and S. M. Goodnick. 2010. The role of the source and drain contacts on self-heating effect in nanowire transistors. Journal of Computational Electronics 9(3-4):180-186. DOI: 10.1007/s10825-010-0334-7. (link )

Vasileska, D., K. Raleva and S. M. Goodnick. 2010. Electrothermal studies of FD SOI devices that utilize a new theoretical model for the temperature and thickness dependence of the thermal conductivity. IEEE Transactions on Electron Devices 57(3):726-728. DOI: 10.1109/TED.2009.2039526. (link )

2009

Ashok, A., D. Vasileska, S. M. Goodnick and O. L. Hartin. 2009. Importance of the gate-dependent polarization charge on the operation of GaN HEMTs. IEEE Transactions on Electron Devices 56(5):998-1006. DOI: 10.1109/TED.2009.2015822. (link )

Vasileska, D., K. Raleva and S. M. Goodnick. 2009. Self-heating effects in nanoscale FD SOI devices: The role of the substract, boundary conditions at various interfaces, and the dielectric material type for the BOX. IEEE Transactions on Electron Devices 56(12):3064-3071. DOI: 10.1109/TED.2009.2032615. DOI: https://ieeexplore.ieee.org/document/5306154.

2008

Raleva, K., D. Vasileska and S. M. Goodnick. 2008. Is SOD technology the solution to heating problems in SOI devices?. IEEE Electron Device Letters 29(6):621-624. DOI: 10.1109/LED.2008.920756. (link )

Raleva, K., D. Vasileska, S. M. Goodnick and M. Nadjaikov. 2008. Modeling thermal effects in nanodevices. IEEE Transactions on Electron Devices 55(6):1306-1316. DOI: 10.1109/TED.2008.921263. (link )

Ramayya, E. B., D. Vasileska, S. M. Goodnick and I. Knezevic. 2008. Electron transport in silicon nanowires: The role of acoustic phonon confinement and surface roughness scattering. Journal of Applied Physics 104:063711. DOI: 10.1063/1.2977758. (link )

2007

Ramayya, E. B., D. Vasileska, S. M. Goodnick and I. Knezevic. 2007. Electron mobility in silicon nanowires. IEEE Transactions on Nanotechnology 6(1):113-117. DOI: 10.1109/TNANO.2006.888521. (link )

2004

Goodnick, S. M., M. Saraniti, D. Vasileska and S. Aboud. 2004. Particle-based methods in computational electronics. IEEE Potentials 23(5):12-16. DOI: 10.1109/MP.2004.1301239. (link )

2000

Gunther, A., M. Khoury, S. Milicic, D. Vasileska, T. Thornton and S. M. Goodnick. 2000. Transport in split-gate silicon quantum dots. Superlattices and Microstructures 27(5-6):373-376. DOI: 10.1006/spmi.2000.0844. (link )

Khoury, M., A. Gunther, S. Milicic, M. J. Rack, S. M. Goodnick, D. Vasileska, T. J. Thornton and D. K. Ferry. 2000. Single-electron quantum dots in silicon MOS structures. Applied Physics A 71:415-421. DOI: 10.1007/s003390000554. (link )

Milicic, S., F. Badrieh, D. Vasileska, A. Gunther and S. M. Goodnick. 2000. 3D modeling of silicon quantum dots. Superlattices and Microstructures 27(5-6):377-382. DOI: 10.1006/spmi.2000.0845. (link )

1999

Dur, M., A. D. Gunther, D. Vasileska and S. M. Goodnick. 1999. Acoustic phonon scattering in silicon quantum dots. Nanotechnology 10(2):142. (link )

1998

Vasileska, D., M. N. Wybourne, S. M. Goodnick and A. Gunther. 1998. 3D simulation of GaAs/AlGaAs quantum dot point contact structures. Semiconductor Science and Technology 13:A37-40. DOI: 10.1088/0268-1242/13/8A/013. (link )

1986

Milicic, S., R. Akis, D. Vasileska, A. Gunther and . . 1986. 3D modeling of discrete impurity effects in silicon quantum dots: Energy level spacing and scarring effects. Superlattices and Microstructures 28(5-6):461-467. DOI: 10.1006/spmi.2000.0949. (link )

Books

2010

Vasileska, D., S. M. Goodnick and G. Klimeck. 2010. Computational Electronics: Semiclassical and Quantum Device Modeling and Simulation. CRC Press. ISBN: 978-1420064834.

2006

Vasileska, D. and S. M. Goodnick. 2006. Computational Electronics: Synthesis Lectures on Computational Electromagnetics. Morgan & Claypool Publishes.

Book Chapters

2018

Raleva, K., A. R. Shaik, R. Hathwar, A. Laturia, S. S. Qazi, R. Daugherty, D. Vasileska and S. M. Goodnick. 2018. Monte Carlo device simulations. Pp. 773-806 In: Piprek, J. ed., Handbook of Optoelectronic Device Modeling & Simulation: Lasers, Modulators, Photodetectors, Solar Cells, and Numerical Methods. Vol II. CRC Press. Boca Raton, FL. ISBN: 978-1498749565.

2011

Vasileska, D., K. Raleva and S. M. Goodnick. 2011. 15. Monte Carolo device simulations. Pp. 2968-3100 In: Mordechai, S. ed., Applications of Monte Carlo Method in Science and Engineering. InTechOpen. ISBN: 978-953-307-691-1.

2006

Vasileska, D., D. K. Ferry and S. M. Goodnick. 2006. Compuational nanoelectronics. Pp. Chapter 125 In: Rieth, M. and W. Schommers eds., Handbook of Theoretical and Computational Nanotechnology. American Scientific Publishers. ISBN: 978-1588830425.

2001

Goodnick, S. M. and D. Vasileska. 2001. Computational electronics. Pp. 1456-1470 In: Buschow, K. J., R. W. Cahn, M. C. Flemings, B. Ilschner, E. J. Kramer, S. Mahajan and P. Veyssiere eds., Encyclopedia of Materials: Science and Technology. Elsevier. ISBN: 9780080431529.

Conference Papers

2010

Raleva, K., D. Vasileska and S. M. Goodnick. 2010. Self-heating effects in high performance devices. Pp. 114-122 In: Gusev, M. and P. Mitrevski eds., ICT Innovations 2010. International Conference on ICT Innovations. Berlin, Heidelberg.

1999

Goodnick, S. M., J. P. Bird, D. K. Ferry, A. Gunther, M. Khoury, M. N. Kozicki, M. J. Rack, T. Thornton and D. Vasileska. 1999. Transport in split gate MOS quantum dot structures. Proceedings Ninth Great Lakes Symposium on VLSI. Ninth Great Lakes Symposium on VLSI. Ypsilanti, NI. (link )